News

The 2026 annual meeting of the Exa-DI project (Development and Integration) of the PEPR NumPEx took place on February 24 and 25^th at Espace Trinité, Paris.

This face-to-face meeting brought together for one day the complete Exa-DI team – the members of each Work Package (WPs), the Program manager of the CDT, the CDT members, the leaders of the co-design/co-development Working groups (WGs) who are member of the Application Demonstrators (ADs) teams, members of others NumPEx projects of the (Exa-MA, Exa-SofT, Exa-DoST and Exa-AToW), as well as representatives from the national (IDRIS, TGCC, CINES) and regional (GriCAD,) computing centres and experts.

This meeting was first an opportunity to create the momentum between all the stakeholders involved in the co-design/co-development processes and second tostrengthen their alignment. This is one of the main objectives of the Backlog sessions in which each co-design/co-development working groups (WGs) presented their roadmap for the next 2-3 month in order to establish, coordinate and organize the engineering activities of the CDT development team. Given the importance and cross-cutting nature of the topic across NumPEx, a presentation on «Task-based programming and its applications » was given by a leading expert from the Exa-SofT project. The Software packaging and deployment session organized with the participation of a regional (GriCAD) and all national computing centres (TGCC, IDRIS and CINES) provides the opportunity to discuss about packaging solutions (e.g., modules, Spack, Guix) with the aim of supporting code developers to port and deploy applications on various architectures, and in particular on leading exascale architectures. The CDT session provide an overview of the current engineering activities of the development CDT team given through four presentations, i.e Infrastructure for Benchmarking, Guix-Based Deployment and unified Kokkos Integration, High-Performance Spectral Element Operators on GPUs and Benchmarking Large Scale Inverse Problems Resolution Algorithms with Benchopt, which was followed by general discussions. Finally, in light of the recent workshop organized by GENCI following Alice Recoque’s procurement February 17-19, 2026), where collaborations between NumPEx, Bull and AMD were discussed, a specific session on possible Exa-DI/AMD/Bull collaborations was organized to, on the one hand, give feedback on the Bull/AMD workshop and, on the other hand, discuss the actions to be implemented to identify and start collaborations with AMD and Bull.

One of main goal of this meeting has been to brainstorm all together on collaboration patterns supporting the ramp-up of the Exa-DI project and their implementation through the co-design/co-development structures set-up in Exa-DI: the CDT, the co-design/co-development WGs, the WPs, etc. A key point was to follow and check that the articulation and coordination of these different structures were carried out correctly and allowed to ensure the co-design/co-development process’s success. This is essential in order to prepare the porting of applications to exascale architectures and in particular to the next European leading exascale facility to be installed at the TGCC, Alice Recoque and open to users by the end of 2027.

This annual meeting of the project is crucial to monitor that the project was being conducted properly and to ensure the proper coordination of engineering and packaging activities within the CDT in collaboration with all the stakeholders, a key point of the co-design and co-development process.

Highlights on the different components of the co-design/co-development process such as the roadmap of the co-design/co-development WGs, the engineering activities of the CDT development team, the software packaging and deployment activities of the CDT enabling team allowed to demonstrate the paramount importance of all these different activities to implement and achieve the co-design and co-development process as well as of the collaborations in the day-to-day reseach & engineering activities. The discussions with the national and regional computing centers clarified the various current and future solutions for software packaging and deployment in the regional and national computing centers and highlighted what will need to be implemented in view of the heterogeneity of future architectures. Moreover, all participants in this session agreed to meet again in the future to keep each other informed of developments and to discuss them together. Overall, the discussions were very fruitful and showed there is a strong motivation and interest in reinforcing collaborations between all the stakeholders involved in the co-design/co-development processes, and avoiding as much as possible silos & work in isolation.

• Introduction
  by Valérie Brenner, CEA research scientist
• Backlog session
  by Jérôme Charousset, CEA engineer
  • Roadmap Working group (WG) 1
    by Henri Calandra, Expert numerical methods and High Performance Computing at TotalEnergies
  • Roadmap WG2
    by Julien Vanharen, Inria research scientist
  • Roadmap WG3
    Maxime Delorme, CEA research scientist
  • Roadmap WG4
    Thomas Moreau, Inria research scientist
• Programmation par tâches et ses applications
  by Samuel Thibault, professor at Bordeaux University
• Sofware packaging and deployment session
  by Benoît Martin, Sorbonne University research scientist
  • Software packaging and deployment in Exa-DI
    by Benoît Martin, Sorbonne University research scientist
    and Bruno Raffin, Inria research scientist
  • Software packaging and deployment at GriCAD
    by Pierre-Antoine Bouttier, CNRS engineer
  • Software packaging and deployment at TGCC
    by Xavier Delaruelle, CEA manager and Laurent Nguyen, CEA engineer
  • Software packaging and deployment at IDRIS
    by Remi Lacroix, CNRS engineer
  • Software packaging and deployment at CINES
    by Gabriel Hautreux, HPC expert at CINES

• CDT session
  by Félix Kpadonou, CEA research scientist
  • Infrastructure for Benchmarking
    by Jérôme Charousset, CEA engineer
  • Guix-Based Deployment and unified Kokkos Integration
    by Aurélien Dauteuil, CEA engineer
  • High-Performance Spectral Element Operators on GPUs
    by Alexandre Roger, CNRS
  • Benchmarking Large Scale Inverse Problems Resolution Algorithms with Benchopt
    by Benoit Malézieux, CNRS research scientist
• AMD collaborations session
  by Jérôme Bobin, CEA research scientist

• Juliette Antonczack, Exa-MA, Université de Strasbourg
• Alexis Badel, Inria
• Rémi Baron, Exa-DI, CEA
• Baptiste Besnard, CNRS
• Julien Bigot, Exa-DI, Inria
• Jérôme Bobin, Exa-DI, CEA
• Pierre-Antoine Bouttier, CNRS
• Thomas Bouvier, Exa-DI, CEA
• Eric Boyer, Genci
• Valérie Brenner, Exa-DI, CEA
• Henri Calandra, AD, TotalEnergies
• Ansar Calloo, Exa-MA, CEA
• Mathieu Certenais, Exa-AToW, Université Rennes
• Aurélien Citrain, Inria
• Jérôme Charousset, Exa-DI, CEA
• Javier Cladellas, Exa-MA, Université Strasbourg

• Ludovic Courtes, Exa-DI, Inria
• Aurélien Dauteuil, Exa-DI, CEA
• Xavier Delaruelle, CEA
• Romain Denelle, EDF
• Maxime Delorme, AD, CEA
• Etienne Decossin, EDF
• Triem Phan Dinh, Exa-DI, CNRS
• Romain Garbage, Exa-DI, Inria
• Damien Gradatour, Exa-DoST, CNRS
• Virginie Grangirard, Exa-DoST, CEA
• Loïc Guoarin, Exa-MA, École Polytechnique
• Gabriel Hautreux, Université de Montpellier
• Skander Khiari, Exa-DI, CEA
• Chai Koren, EDF
• Félix Kpadonou, Exa-DI, CEA
• Rémi Lacroix, CNRS

• Pierre-François Lavallée, CNRS
• Guillaume Lechantre, Genci
• Benoît Malézieux, Exa-DI, CNRS
• Benoît Martin, Exa-DI, CEA
• Marc Antoine Miville-Deschênes, CNRS
• Thomas Moreau, GT IA, CEA
• Laurent Nguyen, CEA
• Augustin Parret-Freaud, Safran Tech
• Bruno Raffin, Exa-DI, Inria
• Alexandre Roger, Exa-DI, CNRS
• Pascal Tremblin, CEA
• Samuel Thibaut, Exa-SofT, Inria
• Jean-Pierre Vilotte, Exa-DI, CNRS
• Julien Vanharen, AD, Inria